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Real-Time Pattern Matching with FPGAs
Louis Woods, Jens Teubner, and Gustavo Alonso
January 2011
We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our solution shows distinctive advantages for stream monitoring tasks, e.g., wire-speed processing and predictable performance. The demonstration is based on a query-to-hardware compiler for complex event patterns that we presented at VLDB 2010 [1]. By example of a click stream monitoring application, we illustrate the inner workings of our compiler and indicate how FPGAs can act as efficient and reliable processors for event streams.
@misc{abc,
	abstract = {We demonstrate a hardware implementation of a
complex event processor, built on top of field-programmable gate
arrays (FPGAs). Compared to CPU-based commodity systems,
our solution shows distinctive advantages for stream monitoring
tasks, e.g., wire-speed processing and predictable performance.
The demonstration is based on a query-to-hardware compiler
for complex event patterns that we presented at VLDB 2010 [1].
By example of a click stream monitoring application, we illustrate
the inner workings of our compiler and indicate how FPGAs can
act as efficient and reliable processors for event streams.},
	author = {Louis Woods and Jens Teubner and Gustavo Alonso},
	title = {Real-Time Pattern Matching with FPGAs},
	url = {http://dx.doi.org/10.1109/ICDE.2011.5767937},
	year = {2011}
}