Publications by Louis Woods
2015
TRETS, February 2015
@article{abc, author = {Louis Woods and Gustavo Alonso and Jens Teubner}, journal = {TRETS}, title = {Parallelizing Data Processing on FPGAs with Shifter Lists.}, url = {http://doi.acm.org/10.1145/2629551}, year = {2015} }
2014
PVLDB, November 2014
@inproceedings{abc, author = {Louis Woods and Zsolt Istv{\'a}n and Gustavo Alonso}, booktitle = {PVLDB}, title = {Ibex - An Intelligent Storage Engine with Support for Advanced SQL Off-loading.}, url = {http://www.vldb.org/pvldb/vol7/p963-woods.pdf}, year = {2014} }
ETH Zürich, Diss. Nr. 21967, July 2014
Supervised by: Prof. Gustavo Alonso
Supervised by: Prof. Gustavo Alonso
@phdthesis{abc, author = {Louis Woods}, school = {21967}, title = {FPGA-Enhanced Data Processing Systems}, year = {2014} }
International Conference on Management of Data, SIGMOD 2014, Snowbird, UT, USA, June 2014
@inproceedings{abc, author = {Zsolt Istv{\'a}n and Louis Woods and Gustavo Alonso}, booktitle = {International Conference on Management of Data, SIGMOD 2014, Snowbird, UT, USA}, title = {Histograms as a side effect of data movement for big data.}, url = {http://doi.acm.org/10.1145/2588555.2612174}, year = {2014} }
2013
23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2013
@inproceedings{abc, author = {Louis Woods and Zsolt Istv{\'a}n and Gustavo Alonso}, booktitle = {23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal}, title = {Hybrid FPGA-accelerated SQL query processing.}, url = {http://dx.doi.org/10.1109/FPL.2013.6645619}, year = {2013} }
Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2013, New York, NY, USA, June 2013
@inproceedings{abc, author = {Louis Woods and Jens Teubner and Gustavo Alonso}, booktitle = {Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2013, New York, NY, USA}, title = {Less watts, more performance: an intelligent storage engine for data appliances.}, url = {http://doi.acm.org/10.1145/2463676.2463685}, year = {2013} }
21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2013, Seattle, WA, USA, April 2013
@inproceedings{abc, author = {Louis Woods and Gustavo Alonso and Jens Teubner}, booktitle = {21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2013, Seattle, WA, USA}, title = {Parallel Computation of Skyline Queries.}, url = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2013.18}, year = {2013} }
Datenbanksysteme für Business, Technologie und Web (BTW), - Workshopband, 15. Fachtagung des GI-Fachbereichs "Datenbanken und Informationssysteme" (DBIS), 11.-15.3.2013 in Magdeburg, Germany. Proceedings, January 2013
@inproceedings{abc, author = {Cagri Balkesen and Louis Woods and Jens Teubner}, booktitle = {Datenbanksysteme f{\"u}r Business, Technologie und Web (BTW), - Workshopband, 15. Fachtagung des GI-Fachbereichs "Datenbanken und Informationssysteme" (DBIS), 11.-15.3.2013 in Magdeburg, Germany. Proceedings}, title = {Tutorium: Neue Hardwarearchitekturen f{\"u}r das Datenmanagement (DPMH).}, year = {2013} }
ACM Transactions on Database Systems (TODS), vol. 38(4), January 2013
@article{abc, author = {Chongling Nie and Louis Woods and Jens Teubner}, journal = {ACM Transactions on Database Systems (TODS), vol. 38(4)}, title = {XLynx\&$\#$151;An FPGA-based XML Filter for Hybrid XQuery Processing.}, year = {2013} }
2012
Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2012, Scottsdale, AZ, USA, May 2012
@inproceedings{abc, author = {Jens Teubner and Louis Woods and Chongling Nie}, booktitle = {Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2012, Scottsdale, AZ, USA}, title = {Skeleton automata for FPGAs: reconfiguring without reconstructing.}, url = {http://doi.acm.org/10.1145/2213836.2213863}, year = {2012} }
2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2012, Toronto, Ontario, Canada, April 2012
@inproceedings{abc, author = {Louis Woods and Ken Eguro}, booktitle = {2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2012}, title = {Groundhog - A Serial ATA Host Bus Adapter (HBA) for FPGAs.}, url = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2012.45}, venue = {Toronto, Ontario, Canada}, year = {2012} }
2011
January 2011
Field-programmable gate arrays (FPGAs) are chip devices that can be runtime-reconfigured to realize arbitrary processing tasks directly in hardware. Industrial products as well as research prototypes demonstrated how this capability can be exploited to build highly efficient processors for data warehousing, data mining, or stream analysis tasks.
On the flip side, the construction of dedicated hardware circuits requires considerable engineering efforts and skills that are often not available in application-focussed development teams. To bridge this gap, at ETH we have developed a set of tools that aid developers of high-performance stream processing solutions and enable agile hardware generation for changing application demands.
In this demonstration, we showcase Snowfall, a compiler tool for low-level stream analysis. Comparable to scanner generators for software-based systems (e.g., lex/flex), Snowfall can be used to decode incoming data streams in hardware, react to low-level patterns in a stream, and perform initial input data analysis. Snowfall plays well together with Glacier, a query-to-hardware compiler that we described and demonstrated earlier. A typical use case is to use Snowfall for input parsing and pre-processing, then perform SQL-style query processing on top with a hardware query plan obtained with the help of Glacier.
In the demo, we illustrate Snowfall based on a real-world use case with exceptionally high demands for throughput and latency. With the help of Snowfall, we perform risk checking for financial trading applications. Snowfall allows for a declarative description of the problem, yet will generate a hardware circuit that can process input streams in real time.
@misc{abc, abstract = {Field-programmable gate arrays (FPGAs) are chip devices that can be runtime-reconfigured to realize arbitrary processing tasks directly in hardware. Industrial products as well as research prototypes demonstrated how this capability can be exploited to build highly efficient processors for data warehousing, data mining, or stream analysis tasks. On the flip side, the construction of dedicated hardware circuits requires considerable engineering efforts and skills that are often not available in application-focussed development teams. To bridge this gap, at ETH we have developed a set of tools that aid developers of high-performance stream processing solutions and enable agile hardware generation for changing application demands. In this demonstration, we showcase Snowfall, a compiler tool for low-level stream analysis. Comparable to scanner generators for software-based systems (e.g., lex/flex), Snowfall can be used to decode incoming data streams in hardware, react to low-level patterns in a stream, and perform initial input data analysis. Snowfall plays well together with Glacier, a query-to-hardware compiler that we described and demonstrated earlier. A typical use case is to use Snowfall for input parsing and pre-processing, then perform SQL-style query processing on top with a hardware query plan obtained with the help of Glacier. In the demo, we illustrate Snowfall based on a real-world use case with exceptionally high demands for throughput and latency. With the help of Snowfall, we perform risk checking for financial trading applications. Snowfall allows for a declarative description of the problem, yet will generate a hardware circuit that can process input streams in real time.}, author = {Jens Teubner and Louis Woods}, title = {Snowfall: Hardware Stream Analysis Made Easy}, year = {2011} }
January 2011
We demonstrate a hardware implementation of a
complex event processor, built on top of field-programmable gate
arrays (FPGAs). Compared to CPU-based commodity systems,
our solution shows distinctive advantages for stream monitoring
tasks, e.g., wire-speed processing and predictable performance.
The demonstration is based on a query-to-hardware compiler
for complex event patterns that we presented at VLDB 2010 [1].
By example of a click stream monitoring application, we illustrate
the inner workings of our compiler and indicate how FPGAs can
act as efficient and reliable processors for event streams.
@misc{abc, abstract = {We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our solution shows distinctive advantages for stream monitoring tasks, e.g., wire-speed processing and predictable performance. The demonstration is based on a query-to-hardware compiler for complex event patterns that we presented at VLDB 2010 [1]. By example of a click stream monitoring application, we illustrate the inner workings of our compiler and indicate how FPGAs can act as efficient and reliable processors for event streams.}, author = {Louis Woods and Jens Teubner and Gustavo Alonso}, title = {Real-Time Pattern Matching with FPGAs}, url = {http://dx.doi.org/10.1109/ICDE.2011.5767937}, year = {2011} }
Workshops Proceedings of the 27th International Conference on Data Engineering, ICDE 2011, Hannover, Germany, January 2011
The rapidly increasing amount of data available for
real-time analysis (i.e., so-called operational business intelligence)
is creating an interesting opportunity for creative approaches to
speeding up data processing algorithms. One such approach that
is starting to become more common is using hardware accelerators
for stream processing. Typically these accelerators are
implemented on top of reconfigurable hardware, known as fieldprogrammable
gate arrays (FPGAs). Though the value of FPGAs
for data warehouses is gradually recognized by the database
community, their true potential for various business analytic tasks
is yet unexplored. In this line of research, we investigate FPGA
technology in the context of extreme data processing looking for
opportunities where FPGAs can be exploited to improve over
classical CPU-based architectures. We introduce a framework
for FPGA-accelerated (real-time) analytics including a query-tohardware
compiler for static complex event detection, an XPath
engine for dynamic query workloads, and templates for highspeed
data mining operators in hardware.
@inproceedings{abc, abstract = {The rapidly increasing amount of data available for real-time analysis (i.e., so-called operational business intelligence) is creating an interesting opportunity for creative approaches to speeding up data processing algorithms. One such approach that is starting to become more common is using hardware accelerators for stream processing. Typically these accelerators are implemented on top of reconfigurable hardware, known as fieldprogrammable gate arrays (FPGAs). Though the value of FPGAs for data warehouses is gradually recognized by the database community, their true potential for various business analytic tasks is yet unexplored. In this line of research, we investigate FPGA technology in the context of extreme data processing looking for opportunities where FPGAs can be exploited to improve over classical CPU-based architectures. We introduce a framework for FPGA-accelerated (real-time) analytics including a query-tohardware compiler for static complex event detection, an XPath engine for dynamic query workloads, and templates for highspeed data mining operators in hardware.}, author = {Louis Woods and Gustavo Alonso}, booktitle = {Workshops Proceedings of the 27th International Conference on Data Engineering, ICDE 2011}, title = {Fast Data Analytics with FPGAs}, url = {http://dx.doi.org/10.1109/ICDEW.2011.5767669}, venue = {Hannover, Germany}, year = {2011} }
2010
PVLDB, January 2010
@article{abc, author = {Louis Woods and Jens Teubner and Gustavo Alonso}, journal = {PVLDB}, title = {Complex Event Detection at Wire Speed with FPGAs.}, year = {2010} }
2009
Systems Group Master's Thesis, no. ETH Zürich; Department of Computer Science, August 2009
Supervised by: Prof. Gustavo Alonso
Supervised by: Prof. Gustavo Alonso
@mastersthesis{abc, author = {Louis Woods}, school = {ETH Z{\"u}rich}, title = {FPGA-Accelerated Pattern Matching over Streams of Events}, year = {2009} }